Delay control in a digital radio transmitter system

ABSTRACT

A relative delay between analog R.F. output signals of a plurality of digital radio transmitters in a digital radio transmitter system is controlled. At least one interface receives delay information for each transmitter. A processing unit determines the relative delay between the output signals based on the received delay information. An adjuster adjusts in the digital domain the absolute delay of at least one of the radio transmitters in accordance with the determined relative delay.

This application is the US national phase of international applicationPCT/EP01/11801 filed 11 Oct. 2001, which designated the US.

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention relates to a digital radio transmitter systemhaving a plurality of digital radio transmitters and more particularlyto a device and a method for controlling a relative delay between analogradio frequency (R.F.) output signals of the plurality of digital radiotransmitters.

2. Discussion of the Prior Art

Digital radio transmitter systems are an essential component of manymodern communication systems like wideband systems for mobilecommunication. Generally, digital radio transmitter systems comprise oneor more digital radio transmitters. A digital radio transmitter receivesa digital input signal, converts the digital input signal into an analogsignal and upconverts the analog signal to a n analog R.F. outputsignal. The analog R.F. output signal of the radio transmitter is passedthrough a power amplifier and then emitted from an antenna system.

An increasing number of applications require the use of digital radiotransmitter systems with two or more radio transmitters, each radiotransmitter defining a separate transmission branch. By equipping adigital radio transmitter system with a plurality of radio transmitters,applications like multi-carrier operation, radio transmitter diversity,load-sharing, and radio transmitter redundancy become feasible.

For example, during multi-carrier operation two or more carriers arejointly clipped in the digital domain of the digital radio transmittersystem and then fed through separate radio transmitter branches. Inother words, each carrier is upconverted to R.F. by a separate radiotransmitter. After separate upconversion, the carriers are combined,jointly amplified and emitted from a single antenna. A typical examplefor a communication system using multiple carriers is a wideband codedivision multiple access (W-CDMA) system.

Another example for digital radio transmitter systems with two or moreradio transmitter branches are systems operating according to theprinciple of radio transmitter diversity, of load-sharing or of radiotransmitter redundancy. During these operation modes a single carrier isfed through two or more separate radio transmitters which operate inparallel. Each radio transmitter conducts a digital-analog conversionand then upconverts the carrier to R.F. The upconverted carriersoutputted by the parallel radio transmitters are individually amplifiedand fed to individual antennas.

Of course, the concept of multi-carrier operation and the concepts ofradio transmitter diversity, load-sharing or radio transmitterredundancy can be combined. As an example, the combination of 4-carrieroperation and radio transmitter diversity necessitates eight separateradio transmitter branches which are configured such that the outputsignals of four radio transmitters are fed to one of two diversityantennas.

In digital radio transmitter systems with two or more digital radiotransmitters, the individual radio transmitter branches ideally exhibitequal delay. In other words, if two digital signals have beenconcurrently fed into two different radio transmitters, the twocorresponding analog R.F. output signals are ideally concurrentlyoutput. Thus, the absolute delays of two or more radio transmitterbranches, i.e., the time difference between feeding an input signal intoa radio transmitter and receiving the corresponding R.F. output signalfrom this radio transmitter, are ideally identical. This means inpractice that the relative delay between the output signals of differentradio transmitters, i.e., the time difference between outputting a firstoutput signal by a first radio transmitter and outputting acorresponding second output signal by a second radio transmitter, mustbe as small as possible. For example, CDMA systems the relative delaymust be small compared to the CDMA chip period.

If the relative delay increases, the transmission quality of a digitalradio transmitter system with two or more radio transmitters decreases.In the case of multi-carrier operation, e.g., an increasing relativedelay destroys the clipping effect. In the case of radio transmitterdiversity, load-sharing or radio transmitter redundancy, an increasingrelative delay results in self interference.

As has become apparent from the above, the object of maintaining a hightransmission quality in a radio transmitter system with a plurality ofradio transmitters necessitates equal or almost equal absolute delayswithin each radio transmitter branch to keep the relative delay betweendifferent radio transmitter branches as low a possible. However, equalor almost equal absolute delays are difficult to attain. One of thereasons therefore are the delay tolerances of the analog components likefilters, amplifiers, etc. of individual radio transmitters. Exactsynchronism between a plurality of radio transmitters is furthermoreprevented by ambient temperature gradients, aging, replacement of radiotransmitter boards in a single radio transmitter branch by boards with adifferent hardware version, etc.

There is, therefore, a need for a device which allows to control therelative delay between analog R.F. output signals of a plurality ofdigital radio transmitters in a digital radio transmitter system in anaccurate and reliable manner to ensure a high transmission quality.There is also a need for a corresponding method for controlling therelative delay between analog R.F. output signals of a plurality ofdigital radio transmitters in a digital radio transmitter system.

SUMMARY OF THE INVENTION

The present invention satisfies this need by providing a device forcontrolling the relative delay between analog R.F. output signals of aplurality of digital radio transmitters in a digital radio transmittersystem, the device comprising at least one interface for receiving delayinformation, a processing unit for determining the relative delaybetween the output signals based on the received delay information, andan adjusting system for adjusting in the digital domain the absolutedelay of at least one of the radio transmitters in accordance with thedetermined relative delay.

According to the invention, the relative delay between the analog R.F.output signals of a plurality of digital radio transmitters iscontrolled by receiving delay information, by determining the relativedelay between the output signals based on the received delayinformation, and by adjusting in the digital domain the absolute delayof at least one of the radio transmitters in accordance with thedetermined relative delay.

Until now, delays of radio transmitters are generally determined duringproduction of the radio transmitters and for individual transmittersonly. The invention, however, enables the determination of the relativedelay during operation of the radio transmitter system and preferablyduring regular operation, i.e., while the radio transmitter systemtransmits user data. Thus, the relative delay can be monitored and, ifnecessary, be adjusted continuously or in specified time intervals whilethe radio transmitter system is in an active state. This ensures aconstantly high transmission quality of the radio transmitter system.Moreover, since the relative delay is controlled by adjusting theabsolute delay of one or more radio transmitters in the digital domain,i.e., prior to a digital-analog conversion step in the radiotransmitter, the absolute delay and thus the relative delay can beaccurately adjusted. This is due to the fact that the adjustment isadvantageously performed digitally and not by means of analog componentssubject to significant delay tolerances. Also, adjustment in the digitaldomain ensures that the radio transmitter characteristics are notcompromised by additional analog components in the analog part of theradio transmitter.

The adjustment of a radio transmitter's absolute delay can be performedwith various objects in respect to the absolute delay between two ormore output signals. Preferably, the absolute delay of one or more radiotransmitters is adjusted such that the relative delay is minimized.However, certain applications may require the adjustment of the absolutedelay such that the relative delay of the output signals assumes aspecific value which need not necessarily be the minimal value.

The one or more interfaces for receiving delay information can beconfigured in various ways. For example, the interfaces can be realizedas hardware solution or software solution depending on the nature of thedelay information to be received.

According to one embodiment of the invention, the interface receivesdelay information from the individual radio transmitters. Each radiotransmitter may comprise a delay database in which the measured delay ofthe individual transmitter is stored. The measuring and storing of thedelay can be performed e.g. during production of the radio transmitterboard. The processing unit may receive the individual delay of eachradio transmitter via the interface and may then determine the relativedelay between the output signals of the radio transmitters based on thereceived delay information.

According to a further embodiment, the control device according to theinvention further comprises a detector system for detecting the analogR.F. output signals of the radio transmitters. The detected outputsignals are transmitted as delay information to the processing unit viathe interface. The processing unit may then determine the relative delaybetween the output signals detected by the detector system.

The detector system for detecting the analog R.F. output signals of theradio transmitters can be configured to detect the output signals priorto their emission from an antenna system or after they have been emittedfrom an antenna system. According to a first embodiment, the detectorsystem comprises a plurality of analog detector units and each detectorunit is arranged such that it detects an analog output signal of one ofthe radio transmitters before an antenna to which this radio transmitteris connected. According to a second embodiment, the detector systemcomprises one or more detection antennas for detecting the analog R.F.output signals after they have been emitted by an antenna system of thedigital radio transmitter system.

Depending on the arrangement of the plurality of digital radiotransmitters in the digital radio transmitter system, the antenna systemof the digital radio transmitter system may have differentconfigurations. According to one embodiment, the two or more outputsignals of the two or more radio transmitters are combined by acombining unit and the combined signal is fed to an antenna system inthe form of a single antenna. In such a case, the output signals of theradio transmitters are preferably detected prior to their combining. Asingle antenna for a plurality of radio transmitter branches is e.g.employed for operating a digital radio transmitter system in amulti-carrier mode. According to a further embodiment, each radiotransmitter is connected to an individual antenna. Thus, the number ofantennas of the antenna system may equal the number of radiotransmitters. Separate antennas for separate radio transmitters are e.g.employed for operating a digital radio transmitter system in a radiotransmitter diversity mode, in a load-sharing mode or in a redundancymode. The two embodiments illustrated above can be combined such that aplurality of combining units is provided, each combining unit beingcoupled to a plurality of radio transmitters which then feed thecombined output signals to a single antenna.

The output signals of the radio transmitters can be detected in manyways depending on the nature of the output signals. As an example, theoutput signals may be detected in the form of specific signal structureslike characteristic signal peaks or characteristic symbol sequences. Ofcourse, the detection of specific symbol sequences may necessitate toperform operations of a typical receiver stage like down-conversion,sampling, analog-digital conversion, demodulation, etc., in order toobtain the symbol sequences from the detected analog R.F. outputsignals. Furthermore, the detection of the output signals may vary inrespect of where and how the output. signals are detected. If the outputsignals are e.g. detected by means of a single detection antenna, theoutput signals of different radio transmitters have to be separated inorder to determine the relative delay. A separation of the respectiveoutput signals becomes possible if the output signals are detected inthe form of mutually orthogonal signal components, e.g. mutuallyorthogonal symbol sequences.

After the analog R.F. output signals of the radio transmitters have beendetected, the relative delay between the detected output signals has tobe determined. The relative delay can e.g. be determined by measuringthe time interval between detection of corresponding signal structuresin the output signals from different radio transmitters. As pointed outabove, the corresponding signal structures can be characteristic signalpeaks or mutually orthogonal symbol sequences. As a further example, therelative delay may be determined as the time difference between theabsolute delays in different radio transmitters. In other words, in afirst step the processing unit may measure absolute delays of differentradio transmitters and in a second step the processing unit maydetermine the relative delay by comparing the measured absolute delays.The absolute delays of the different radio transmitters can bedetermined in various ways. Preferably, each absolute delay isdetermined as the time interval between a common timing event for allradio transmitters or an individual timing event for each radiotransmitter and detection of an analog output signal. A common timingevent may be a synchronization signal of the digital radio transmittersystem and an individual timing event may be the detection of a digitalinput signal of a specific radio transmitter. In order to generate theindividual timing events, a plurality of digital detector units fordetecting the digital input signals of the radio transmitters may beprovided. Each digital detector may be arranged in a signal path beforeone of the radio transmitters in order to detect e.g. a specific signalcomponent such as a characteristic signal peak in the digital inputsignal. In case of multi-carrier operation with clipping, the digitaldetector units preferably detect the digital input signal after theclipping units but before the radio transmitters.

After the relative delay between the detected output signals has beendetermined, the absolute delay of at least one of the radio transmittershas to be adjusted in the digital domain in accordance with thedetermined relative delay. This means that based on the result of thedetermination of the relative delay one or more absolute delays areadjusted as required in order to maintain a high transmission quality.

The relative delay is adjusted by means of adjusting one or moreabsolute delays and the absolute delays are adjusted by means of anadjusting system. Preferably, the adjusting system is configured as adelay system. In other words, the absolute delays are preferablyadjusted such that the duration of the absolute delays is increased.

The adjusting system may be switched in an upsampling system of one ormore radio transmitters. Consequently, the absolute delays may beadjusted during upsampling of the digital input signals in the radiotransmitters. Preferably, the upsampling system comprises one or moresampling stages, each sampling stage operating at a specific samplingfrequency. The adjusting unit may then adjust the relative delay inmultiples of the specific sampling frequencies.

The adjusting system can comprise one or more individual adjusting unitswhich may be arranged before, between or after the sampling stages. Eachadjusting unit may comprise one or more shift registers and the samplingstages may be configured as interpolation filters.

The device for controlling a relative delay between analog R.F. outputsignals of a plurality of digital radio transmitters outlined above maybe employed in various communication systems and preferably in mobilecommunication systems. As an example, a digital radio transmitter systemcomprising the device may be part of a base transceiver station of amobile communication network.

BRIEF DESCRIPTION OF THE DRAWINGS

Further aspects and advantages of the invention will become apparentupon reading the following detailed description of preferred embodimentsof the invention and upon reference to the drawings in which:

FIGS. 1 to 4 show block diagrams of a first, a second, a third, and afourth embodiment of a device according to the invention for controllingthe relative delay between analog R.F. output signals of a plurality ofdigital radio transmitters in a digital radio transmitter system;

FIG. 5 shows an antenna configuration of the device depicted in FIG. 3;

FIG. 6 shows a block diagram of the digital part of a state in the artradio transmitter;

FIG. 7 shows a block diagram of an embodiment of an adjusting system foradjusting in the digital domain the absolute delay of a radiotransmitter; and

FIG. 8 shows a more detailed block diagram of the adjusting systemdepicted in FIG. 5.

DESCRIPTION OF PREFERRED EMBODIMENTS

Referring now to the accompanying drawings, the preferred embodiments ofthis invention are described.

In FIG. 1, schematic diagrams of a digital radio transmitter system 100and of a device 200 for controlling a relative delay between analog R.F.output signals of two digital radio transmitters 102, 104 areillustrated. The digital radio transmitter system 100 is part of aW-CDMA base transceiver station of a cellular communication system.

The digital radio transmitter system 100 of FIG. 1 is operated in a2-carrier mode. A first carrier is transmitted on a first radiotransmitter branch 106 and a second carrier is transmitted on a secondradio transmitter branch 108 of the radio transmitter system 100. Eachradio transmitter branch 106, 108 comprises a clipping unit 110, 112 aswell as one radio transmitter 102, 104. A first carrier transmitted onthe first radio transmitter path 106 is inputted in the form of adigital baseband IQ-signal into the first clipping unit 110 and a secondcarrier transmitted on the second radio transmitter path 106 is inputtedin the form of a digital baseband IQ-signal into the second clippingunit 112. Concurrently, information relating to the second carrier isinputted into the first clipping unit 110 and information relating tothe first carrier is inputted into the second clipping unit 112. In theclipping units 110, 112 the digital signals are clipped usinginformation of all carriers.

After clipping the first carrier and the second carrier, the clippedfirst carrier is inputted as a digital input signal into the first radiotransmitter 102 and the clipped second carrier is inputted as a secondinput signal into the second radio transmitter 104. The radiotransmitters 102, 104 then perform digital sampling in digital radiotransmitter parts 102 a, 104 a, digital-analog conversion bydigital-analog converters 102 b, 104 b, modulation and up-conversion ofthe received input signals in order to generate an analog R.F. outputsignal. The analog R.F. output signal of the first radio transmitter 102and the analog R.F. output signal of the second radio transmitter 104are combined by a combining unit 114, amplified by a multi-carrier poweramplifier (MCPA) 116 and emitted from a single system antenna 118.

Both the first radio transmitter 102 and the second radio transmitter104 exhibit a specific absolute delay. Due to the delay tolerances ofthe analog parts 102 c, 104 c of the radio transmitters 102, 104, theabsolute delays of the two radio transmitters 102, 104 will generallynot be identical. Consequently, synchronism between a digital signaltravelling on the first radio transmitter branch 106 and a digitalsignal travelling on the second radio transmitter branch 108 willgenerally be lost after the behind radio transmitters 102, 104, i.e., inthe analog domain. Thus, a relative delay between the output signal ofthe first radio transmitter 102 and the output signal of the secondradio transmitter 104 will arise here. This relative delay, however, maydestroy the clipping effect and thus compromise the transmission qualityof the digital radio transmitter system 100.

In order to ensure a high transmission quality, the digital radiotransmitter system 100 of FIG. 1 comprises a device 200 for controllingthe relative delay between the analog R.F. output signals of the twodigital radio transmitters 102, 104. The device 200 comprises a detectorsystem with two analog detector units 202, 204 for detecting the analogoutput signals of the radio transmitters 102, 104, a processing unit 206for determining the relative delay between the detected output signals,and an adjusting system (FIGS. 6 and 7) arranged within the digitalparts 102 a, 104 a of the radio transmitter 102, 104. The device 200further comprises two digital detector units 208, 210 for detectingdigital input signals of the transmitter units 102, 104.

The device 200 has two interfaces 206 a, 206 b for receiving delayinformation. The first interface 206 a is arranged between the digitaldetector units 208, 210 and the processing unit 206. The first interface206 a receives delay information in the form of detector signals fromthe digital detector units 208, 210 and transfers these detector signalsto the processing unit 206. The second interface 206 b is arrangedbetween the two analog detector units 202, 204 and the processing 206.The second interface 206 b receives delay information in the form ofdetector signals from the analog detector units 202, 204 and transfersthese detector signals to the processing unit 206.

Next, control of the relative delay between the analog output signals ofthe radio transmitters 102, 104 by means of the control device 200 isdescribed.

In a first step, the absolute delay between input of a digital signalinto each radio transmitter and output of a corresponding output signalis determined for each of the two radio transmitters 102, 104. In asecond step, the relative delay between the output signals of the tworadio transmitters 102, 104 are calculated based on the determinedabsolute delays. Finally, in a third step, the absolute delay of one orboth of the radio transmitters 102, 104 is adjusted such that therelative delay between the output signals is minimized.

The absolute delay for the radio transmitters 102, 104 is determined asfollows. Each wideband CDMA signal transmitted on radio transmitterbranches 106, 108 is a statistical signal with characteristic peaks.Such a characteristic peak first appears in the digital domain of thesignal and after the radio transmitter's absolute delay in the analogdomain at the radio transmitter output. Thus, the time interval betweenappearance of the characteristic peak in the digital domain andappearance of the same characteristic peak in the analog domain of thesame radio transmitter branch reflects the radio transmitter's absolutedelay.

In the following, the determination of the absolute delay in the firstradio transmitter branch 106 is exemplarily illustrated. The digitaldetector unit 208 is configured as a peak detector and detects acharacteristic signal peak of the digital baseband IQ-signal in thedigital domain, e.g. in the digital part 102 a of the radio transmitter102. The detection is performed after the clipping unit 110 because theclipping unit changes the peak amplitude.

The detection can generally take place anywhere after the clipping unit110 and before the analog digital converter 102 b of the radiotransmitter 102. However, in case of a CDMA system it is advantageous toperform the detection of the digital input signal after the digitalinput signal has passed a root raised cosine filter in the digital part102 a of the radio transmitter 102 because the root raised cosine filtermay cause itself small delays depending on the amplitude of its inputsignal. While this amplitude dependence is no problem if identical inputsignals are inputted into root raised filters of different radiotransmitter branches (e.g. in radio transmitter diversity systems), inthe case of different input signals the delay control becomes more exactif the detection is performed after the root raised cosine filter.

After the digital detector unit 208 has detected a characteristic peak,the digital detector unit outputs a corresponding detector signal viathe first interface 206 a to the processing unit 206. This detectorsignal from the digital detector unit 208 is used as a start signal forstarting an internal timer within the processing unit 206.

After a time interval corresponding to the radio transmitter's 102absolute delay, the characteristic signal peak used for starting theprocessing unit's 206 internal timer will appear in the analog domainbetween the output of the radio transmitter 102 and the input of thecombining unit 114. The characteristic peak in the analog domain isdetected by the analog detector unit 202 which is also configured as apeak detector. The first radio transmitter branch 106 communicates withthe analog detector unit 202 by means of a coupler 120. The coupler 120is arranged somewhere between the output of the radio transmitter 102and the input of the combining unit 114. A similar coupler 122 isarranged between the output of the other radio transmitter 104 and theinput of the combining unit 114.

When the analog detector unit 202 detects the characteristic peak, acorresponding detector signal is inputted via the second interface 206 binto the processing unit 206. This detector signal from the analogdetector unit 202 is used as a stop signal to stop the internal timer ofthe processing unit 206. The time interval measured by the internaltimer can thus be interpreted as the absolute delay of the radiotransmitter 102. In the same manner as described above with respect tothe first radio transmitter branch 106, the processing unit 206 alsodetermines the absolute delay of the radio transmitter 104 arranged inthe second radio transmitter branch 108.

Once the absolute delay of each of the two radio transmitters 102, 104has been measured, the processing unit 206 compares the measuredabsolute delays. The relative delay of the output signals of the radiotransmitters 102, 104 can be interpreted as the time difference betweenthe absolute delays of the radio transmitters 102, 104.

If the absolute delays of the radio transmitters 102, 104 are identical,no further steps have to be taken since the relative delay equals zero.On the other hand, if the absolute the delays of the radio transmitters102, 104 are not identical, the processing unit 206 determines the timedifference between the absolute delays of the radio transmitters 102,104. The processing unit 106 further determines which of the radiotransmitters 102, 104 exhibits the shorter absolute delay. Based on thisinformation, the processing unit 206 controls the adjusting system ofthe radio transmitter which exhibits the shorter absolute delay suchthat the duration of the shorter absolute delay is increased by a timeinterval corresponding to the determined relative delay. In other words,the shorter absolute delay is increased such that it equals the longerabsolute delay. Thus, the relative delay between the analog outputsignals of the digital radio transmitters 102, 104 is minimized.

In FIG. 2, a schematic diagram of a second embodiment of a device 200for controlling the relative delay between analog R.F. output signals oftwo digital radio transmitters 102, 104 in a digital radio transmittersystem 100 is depicted. Whereas the digital radio transmitter system ofFIG. 1 is operated in a multi-carrier mode, the digital radiotransmitter system 100 depicted in FIG. 2 is operated in a radiotransmitter diversity mode based on a single carrier.

Again, the digital radio transmitter system 100 comprises two radiotransmitter branches 106, 108 and one radio transmitter 102, 104 perradio transmitter branch 106, 108. However, the output signals of theradio transmitters 102, 104 are not combined, but fed into to separatepower amplifiers 130, 132 and emitted from separate antennas 134, 136.Consequently, each radio transmitter branch 106, 108 comprises anindividual power amplifier 130, 132 and an individual antenna 134, 136.

It was pointed out above that a relative delay between the outputsignals of two digital radio transmitters 102, 104 operated in a radiotransmitter diversity mode can result in self interference of theemitted output signals. In case of e.g. CDMA systems this is usually thecase when the relative delay between the emitted output signals isgreater than some fraction of the CDMA chip period. Consequently, duringthe radio transmitter diversity operation the relative delay between theoutput signals have to be controlled in order to guarantee a hightransmission quality.

Again, the relative delay in the digital radio transmitter system 100operated in a radio transmitter diversity mode is controlled by acontrol device 200 as discussed in context with the first embodiment.However, the digital input signal is detected by the digital detectorunit 208, 210 at the input port of the radio transmitters 102, 104,i.e., prior to root raised cosine filtering.

The analog detector units 202, 204 and the digital detector units 208,210 depicted in FIGS. 1 and 2 need not necessarily be configured as peakdetectors. The detector units 202, 204, 208, 210 can also be configuredto detect a pre-defined signal component or symbol sequence. Detectingsymbol sequences in the output signals of the radio transmitters 102,104 makes it necessary to perform down-conversion, sampling,analog-digital conversion, demodulation and digital filtering in theanalog detector units 202, 204 or in the processing unit 206 in order toobtain the symbol sequences comprised within the output signals.

In FIG. 3, a schematic diagram of a third embodiment of a device 200 forcontrolling the relative delay between analog R.F. output signals of twodigital radio transmitters 102, 104 in a digital radio transmittersystem 100 is depicted. Like the digital radio transmitter system ofFIG. 2, the digital radio transmitter system 100 of FIG. 3 is operatedin a radio transmitter diversity mode based on a single carrier.

In contrast to the control devices depicted in FIGS. 1 and 2, thecontrol device 200 of FIG. 3 does not comprise two interfaces but only asingle interface 206 a. The interface 206 a is arranged between anindividual delay database of each of the radio transmitters 102, 104 andthe processing unit 206. The interface 206 a is configured to read outthe delay information stored in the delay databases of the radiotransmitters 102, 104 and to provide the received delay information tothe processing unit 206. The delay information stored in the individualdelay databases of the radio transmitters 102, 104 relates to theabsolute delay of each individual radio transmitter 102, 104 as measuredduring production of the radio transmitter 102, 104. Based on theabsolute delay of each individual radio transmitter 102, 104 receivedvia the interface 206 a, the processing unit 206 calculates the relativedelay and controls the adjusting system (not depicted in FIG. 3) suchthat the relative delay between the analog R.F. output signals of thetwo radio transmitters 102, 104 is minimized.

In FIG. 4, a fourth embodiment of a device 200 for controlling therelative delay between the analog R.F. output signals of two digitalradio transmitters 102, 104 in a digital radio transmitter system 100 isillustrated. Similar to the digital radio transmitter systems depictedin FIGS. 2 and 3, the digital radio transmitter system 100 of FIG. 4 isoperated in a radio transmitter diversity mode. The digital radiotransmitter system 100 has two radio transmitter branches 106, 108. Eachradio transmitter branch 106, 108 comprises an individual radiotransmitter 102, 104 an individual power amplifier 130, 132 and anindividual antenna 134, 136.

The device 200 for controlling the relative delay between the analogR.F. output signals of the two digital radio transmitters 106, 108deviates from the control device 200 of the first and second embodimentin that the output signals are not detected in the signal path prior tothe antennas 134, 136 but after the output signals have been emittedfrom an antenna system comprising the two antennas 134, 136. Thedetector system of the control device 200 is constituted by a smalldetector antenna 212 which detects the output signals of the two radiotransmitters 102, 104 after they have been emitted from the antennasystem of the digital radio transmitter system 100. The signals detectedby the detector antenna 212 are received by the interface 206 a andinputted into the processing unit 206.

The arrangement of the detector antenna 212 relative to the antennasystem of the digital radio transmitter system 100 is depicted in FIG.5. As can be seen from FIG. 5, the detector antenna 212 is arrangedsymmetrically with respect to the plurality of antennas of the digitalradio transmitter system 100.

The antenna system of FIG. 5 comprises three antenna pairs, each antennapair looking in the same direction and defining one of three diversityantenna sectors 152, 154, 156. For example, the two antennas 134, 136 ofthe radio transmitter system 100 depicted in FIG. 4 define the diversityantenna sector 154. An antenna signal of each antenna pair is emitted ina sector with an opening angle of 120°. This helps to minimize crossinterference effects because a base station in a next cell that is inthe shadow of the opening angle of one of the diversity antenna sectors152, 154, 156 can use the same frequency as the corresponding diversityantenna sector 152, 154, 156.

In the antenna system depicted in FIG. 5, a delay adjustment asexemplarily depicted in FIG. 4 has to be provided for each pair ofantennas. Consequently, two more arrangements similar to the arrangementof FIG. 4 can be employed to control the delay of the two additionalantenna pairs, respectively, which define the diversity antenna sectors152 and 156. Thus, three identical processing units 206 may be provided.Alternatively, these three processing units may be combined to a singleprocessing unit for all six radio transmitters needed to operate theantenna system of FIG. 5. This would minimize hardware requirements.

Returning now to FIG. 4, it becomes clear that the processing unit 206is not only connected to the detector antenna 212 but is via theinterface 206 a in communication with the main processor 214 and thesystem frame sync (SFS) 216 of the base transceiver station to which thedigital radio transmitter system 100 belongs. The main processor 214informs the processing unit 206 on which channels, belonging to thedifferent branches of the sectors, a delay measurement has to beperformed and how these channels are related to the SFS in formed andhow these channels are related to the SFS in time. The SFS thus providestiming events.

In case of radio transmitter diversity the signals of one and the samechannel have different pilot sequences on each antenna, the differentpilot sequences being orthogonal to each other. The control device 200depicted in FIG. 4 is configured to detect the mutually orthogonal pilotsequences by means of the detector antenna 212 and to determine therelative delay between the output signals of the radio transmitters 102,104 based on the relative time differences between detecting of thepilot sequences or based on the absolute delays between the common SFSand the detected pilot sequences.

The processing unit 206 receives the channels via the detection antenna212 and thus works e.g. like a conventional mobile telephone. Theprocessing unit 206 performs down conversion, sampling, analog-digitalconversion, demodulation and digital filtering of the received channelsand delivers samples of the corresponding I and Q components with e.g.two of four times oversampling. The samples are saved in a buffer andconstitute the digital representation of the received channels with aresolution of one half or one quarter of the CDMA chip time according tothe oversampling rate. The time resolution of a channel measurement isdetermined by the time resolution of the samples.

Values between the saved samples are computed by interpolation therebyincreasing the digital time resolution. In the interpolated signal thepilot sequences are identified and their absolute delay relative to theSFS of the channels and the received signal is determined. Based on thedetermined absolute delays the processing unit 206 calculates the mutualrelative delays between the branches in each sector and controls anadjusting system in the digital part 102 a, 104 a of each radiotransmitter 102, 104 such that the relative delays are minimized.

Other orthogonal sequences comprised within the frame structure of thesignals to be transmitted can be used for determining the relative delaybetween the detected output signals of the radio transmitters instead ofthe pilot sequences. For example, in case of load sharing, the channelsof different antennas have different spreading sequences which are alsoorthogonal to each other. Therefore, these spreading sequences can alsobe used for determining the relative delay between the detected outputsignals.

In the embodiment depicted in FIG. 4, the analog R.F. output signals aredetected by means of the detection antenna 212. According to a furtherembodiment, the analog R.F. output signals could also be tapped offbefore the antennas 134, 136 by couplers not depicted in FIG. 4. In theembodiment depicted in FIG. 4 and in the embodiments of FIGS. 1 to 3 theanalog R.F. output signals can be tapped off prior to or after the poweramplifiers. If the output signals are tapped off between the poweramplifier and an antenna, also the delay of the power amplifier may betaken into account and compensated. However, the delay variations ofpower amplifiers are often so minimal that tapping off the signal beforethe power amplifier is not critical.

When couplers are used to tap off the output signals in the embodimentdepicted in FIG. 4, the output signals may be detected in the form ofpilot sequences or spreading sequences. However, different symbolsequences which are comprised within the frame structure could also bedetected as output signals. Moreover, instead of the provision of aseparate processing unit 206 the function of the processing unit 206could be placed within the main processor 216 of the base transceiverstation.

It has been pointed out above that the adjustment system of the controldevices 200 depicted in FIGS. 1 to 4 is comprised within the digitalparts 102 a, 104 a of the radio transmitters 102, 104. In the following,the function and construction of one exemplary embodiment of anadjusting system according to the invention is illustrated in moredetail. This inventive adjustment system can be used either incombination with the control devices 200 depicted in FIGS. 1 to 4 orseparately, i.e. independently from these control devices 200.

Generally, before a digital signal is converted in a radio transmitterinto an analog signal, it is processed as digital in-phase (I) andquadratur (Q) signals. In the digital part of a radio transmitter I- andQ-signals are upsampled to the specific sample rate of a subsequentdigital-analog converter by a cascade of digital FIR interpolatingfilters. FIG. 6 shows a block diagram of the digital part of a state ofthe art radio transmitter with digital f_(s)/4 IQ-modulator 301 forwideband CDMA. The I- and Q-signals are delivered from a spreading andcombining unit not depicted in the drawings at a CDMA chip rate f_(c).In a root raised cosine (RRC) filter 302 the I- and Q-signal sequencesare interpolated by a factor of two and root raised cosine filtered. Itwas pointed out in context with FIG. 1 that the digital input signalused for the determination of a radio transmitter's absolute delay ispreferably detected after this RRC filter 302.

The root raised cosine filtered signals are interpolated to a samplerate f_(s) by a chain of consecutive interpolation filters 304, 306,308, each interpolation filter 304, 306, 308 having an interpolationfactor of two. The filters 302, 304, 306, 308 constitute together anupsampling system 300, each filters 302, 304, 306, 308 defining anindividual sampling stage. As can be seen from FIG. 6, the samplingfrequency doubles after each sampling stage 302, 304, 306, 308. If msampling stages 302, 304, 306, 308 are provided, the I- and Q-signalsequences entering the upsampling system 300 with the frequency off_(c)=f_(s)/2^(m) are interpolated to the sampling rate f_(s).

The digital IQ-modulator 301 having a modulation frequency of f_(s)/4combines the interpolated I- and Q-signals into a radio signal with adigital intermediate frequency of f_(s)/4. The modulated radio signal isthen inputted into a digital analog converter (reference numerals 102 b,104 b in FIGS. 1 to 4) which is updated at the frequency f_(s) and whichtransforms the digital radio signal into the analog domain. The analogradio signal is upconverted in the analog part (reference numerals 102c, 104 c in FIGS. 1 to 4) of the radio transmitter and is then amplifiedand transmitted from an antenna.

In FIG. 7, the digital part 102 a of the radio transmitter 102 with anadjusting system 400 according to the invention is shown. The digitalpart 104 a of the other radio transmitter 104 may comprise the same or asimilar adjusting system 400. The digital part of the radio transmitterthus comprises an upsampling system with a plurality of sampling stagesin the form of the filters 302, 304, 306, 308.

The adjusting system is switched in the upsampling system 300 andcomprises several adjusting units 402, 404, 406, 408 which are arrangedbefore, between and after the individual The sampling stages, i.e., theinterpolation filters 302, 304, 306, 308. The adjusting units 402, 404,406, 408, 410 are configured as delay elements in the form of shiftregister stages.

Each single adjusting unit 402, 404, 406, 408, 410 allows to delay thesignal by one clock circle of the sample frequency of the correspondingsampling stage. Due to the cascade of sampling stages 302, 304, 306, 308interpolating by a factor of two, the sample frequency doubles aftereach sampling stage 302, 304, 306, 308. This means that the delay timesof the corresponding consecutive adjusting units 402, 404, 406, 408, 410are halved from one adjusting unit to the next adjusting unit.

In FIG. 7, z^(−k) denotes a delay by k times the clock cycle with thefrequency f_(c)=f_(s)/2^(m). Likewise, z₁ ⁻¹ denotes a delay by oneclock cycle with frequency 2f_(c)=f_(s)/2^(m−1) and so on. It is clearfrom FIG. 7 that the lowest delay is 1/f_(s) and the highest delay isthe chip period 1/f_(c) or a multiple k thereof as indicated by z^(−k).For example, if the sampling rate at the digital-analog converter 102 bis f_(s)=65.536 MHz and the chip rate f_(c)=4.096 Mcps, the delay can becontrolled in steps of 1/16 of the chip time. Since the delay elementare power of two multiples of 1/f_(c), a plurality of selectors 413,414, 416, 418, 420 which switch in the delays can easily be controlledby the bits of a binary control word 412.

In FIG. 8, an implementation of the adjusting system 400 of FIG. 6 isshown in more detail. Each adjusting unit 402, 404 406, 408, 410consists of a register in the form of a number of parallel flip flops.The register width corresponds to the bit resolution of the signalsamples transmitted over the I-signal path and the Q-signal path. Eachadjusting unit 402, 404 406, 408, 410 is clocked by the samplingfrequency of the corresponding sampling stage. Thus, the adjustingsystem 400 allows the adjustment of the absolute delay in the radiotransmitter 102 in multiples of the sampling frequency of a specificsampling unit 302, 304, 306, 308, the sampling frequencies of theconsecutive sampling units 302, 304, 306, 308 differing by a factor oftwo.

It has been pointed out in context with FIG. 7 that the first adjustingunit 402 delays by multiples k of the chip time. Preferably, the firstadjusting unit 402 is realized as a cascade of register stages with thenumber of registers of a consecutive register stage being twice that ofthe preceeding register stage. FIG. 8 exemplarily illustrates theadjusting unit 402 which is constituted by the two register stages 402a, 402 b having delays of one and two chip times, respectively. Theadjusting unit 402 could be extended by register stages with 4, 8, 16etc. registers. This allows the control of an entire chain of registerstages by the bits of a binary control word.

Variations of the construction of the radio transmitter 102 maynecessitate different configurations of the adjusting system 400. As anexample, if the IQ-modulator 301 is realized as an analog component, thelast adjusting unit 410 must be placed directly behind the last samplingstage (interpolation filter) 308 and before the analog IQ-modulator 301.Also, sampling stages having higher sampling factors than two can beemployed. Different sampling factors would influence the delay times.Furthermore, as shown with respect to the first adjusting unit 402 ofthe adjusting unit depicted in FIG. 8, the adjusting units or theregister stages comprised within an adjusting unit can be switched inseries or in parallel in order to allow alternative control of the delaytimes. For example, adjusting units having delays differing by factorsof two can be switched in series or adjusting units having delaysdiffering by single delay times can be switched in parallel.

1. A device for controlling a relative delay between a same analog R.F.output signal of a plurality of digital radio transmission branches in adigital radio transmitter system, each radio transmission branchincluding a digital part for receiving a digital input signal, a digitalto analog converter for converting the digital input signal to an analogsignal, and an analog part converting the analog signal to an analog RFoutput signal, comprising: at least one interface for receiving absolutedelay information signals for each radio transmission branch; aprocessing unit for (1) determining an absolute delay for each radiotransmission branch by determining a time difference between feeding aninput signal into the radio transmission branch and providing acorresponding RF output signal from the radio transmission branch, and(2) determining the relative delay between outputing the same R.F.output signal from each radio transmission branch based on the receivedabsolute delay information signals; and adjusting circuitry foradjusting in the digital part of one of the radio transmission branchesthe absolute delay of that one radio transmission branch in accordancewith the determined relative delay.
 2. The device according to claim 1,wherein the interface is configured to readout absolute delayinformation from each of the individual radio transmission branches. 3.The device according to claim 1, further comprising a detector systemfor detecting the same analog R.F. output signals of the radiotransmission branches.
 4. The device according to claim 3, wherein thedetector system comprises, a plurality of analog detector units, eachanalog detector unit detecting the same analog output signal of acorresponding one of the radio transmission branches before it isemitted from an antenna system.
 5. The device according to claim 1,further comprising a combining unit for combining the RF output signalsof two or more of the radio transmission branches.
 6. The deviceaccording to claim 3, wherein the detector system comprises a detectorantenna.
 7. The device according to claim 6, where plural ones of thetransmission branch each has a corresponding antenna, and wherein thedetector antenna is arranged symmetrically with respect to the antennas.8. The device according to claim 1, wherein the adjusting circuitry isconfigured to delay one of the digital input signal in one of thereceiving branches to reduce the relative delay.
 9. The device accordingto claim 1, wherein the adjusting circuitry includes upsamplingcircuitry.
 10. The device according to claim 9, wherein the upsamplingcircuitry comprises one or more sampling stages, each sampling stageoperating at a specific sampling frequency, and wherein the adjustingcircuitry is configured to adjust the absolute delay in accordance withthe specific sampling frequencies.
 11. The device according to claim 1,wherein the adjusting circuitry comprises one or more adjusting units,each adjusting unit having one or more shift registers for implementinga delay to one of the input digital signals.
 12. A digital radiotransmitter system comprising the device according claim
 1. 13. A basetransceiver station comprising the digital radio transmitter systemaccording to claim
 12. 14. A method for controlling a relative delaybetween a same analog R.F. output signal of a plurality of digital radiotransmission branches in a digital radio transmitter system, each radiotransmission branch including a digital part for receiving a digitalinput signal, a digital to analog converter for converting the digitalinput signal to an analog signal, and an analog part converting theanalog signal to an analog RF output signal, comprising: determiningabsolute delay information for each radio transmission branch based on atime when the radio transmission branch outputs the same analog RFoutput signal; determining the relative delay between outputing the sameRF output signal from each of the radio transmission branches based onthe absolute delay information; adjusting in the digital part of one ofthe radio transmission branches the absolute delay of that one radiotransmitter in accordance with the determined relative delay.
 15. Themethod according to claim 14, wherein the same analog RF output signalin each radio transmission branch is detected during regular operationof the digital radio transmitter.
 16. The method according to claim 14,wherein one of the absolute delays is adjusted to reduce the relativedelay.
 17. The method according to claim 14, further comprisingdetecting the same analog R.F. output signal of each radio transmissionbranch and receiving the detected output signals as absolute delayinformation.
 18. The method according to claim 17, wherein the sameanalog RF output signal for each radio transmission branch is detectedprior to emission from an antenna system.
 19. The method according toclaim 17, wherein the same analog RF output signal for each radiotransmission branch is detected after emission from an antenna.
 20. Themethod according to claim 17, wherein the relative delay is determinedas the time interval between detection of the same RF output signal fromdifferent radio transmission branches or wherein the relative delay isdetermined as the time difference between absolute delays in differentradio transmission branches.
 21. The method according to claim 20,wherein each absolute delay is determined as the time interval betweendetection of the output signal and a common or an individual timingevent.
 22. The method according to claim 17, wherein the output signalsare detected in the form of mutually orthogonal signal components. 23.The method according to claim 17, wherein at least one of the outputsignals and the input signals are detected in the form of characteristicsignal peaks.
 24. The method according to claim 14, wherein the absolutedelay of one radio transmission branch is adjusted such that itsabsolute delay increases.
 25. The method according to claim 14, whereinthe absolute delay is adjusted during upsampling of a digital inputsignal of at least one of the radio transmission branches.
 26. Themethod according to claim 25, wherein the absolute delay is adjustedbased on specific sampling frequencies used during upsampling.